Regviz

NXP Semiconductors /LPC13xx /PMU /GPREG4

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GPREG4

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC13xx/PMU/GPREG4#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0 (DISABLED)WAKEUPHYS 0GPDATA

WAKEUPHYS=DISABLED

Description

General purpose register 4

Fields

RESERVED

Reserved. Do not write ones to this bit.
WAKEUPHYS

WAKEUP pin hysteresis enable

0 (DISABLED): Hysteresis for WAKUP pin disabled.

1 (ENABLED): Hysteresis for WAKEUP pin enabled.
GPDATA

Data retained during Deep power-down mode.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data